What Is the “Optical Forward, Copper Backward” Narrative: Has Intel EMIB Outperformed TSMC in AI Optical Interconnect Technology?

AI computing triggers a shift from light to copper decline, with analysts indicating that Intel's EMIB packaging has advantages over TSMC's CoWoS in co-packaged optical (CPO) yield and heat dissipation.

As AI computing demands explode, data center transmission bottlenecks are extending from the chips themselves to packaging and interconnect architectures. Co-Packaged Optics (CPO) is seen as the next key infrastructure revolution, but who can first solve the triple challenges of yield, heat dissipation, and fiber alignment will determine the outcome of this race. Recently, semiconductor analyst Bubble Boi highlighted that Intel's EMIB packaging technology has advantages, directly stating that TSMC's CoWoS faces bottlenecks in CPO integration, sparking heated discussion in the community.

（When memory stacking reaches its limit: How optical interconnects can make GPU–HBM packaging the new favorite?）

Why can't "copper wires" support data transmission in the AI era?

In current AI data center architectures, the scale of GPU clusters continues to expand, with high-bandwidth, low-latency data transfer relied upon between multiple GPUs, between GPUs and high-bandwidth memory (HBM), and across server racks. However, traditional copper cables and electrical signals are approaching physical limits due to massive data flows and energy consumption demands.

According to Goldman Sachs research, the optical communications market is projected to grow from about $15 billion in 2026 to $154 billion by 2028, a tenfold increase within two years. This wave of "light replacing copper" hinges on the core solution of co-packaged optics (CPO): integrating optical engines directly into chip packages, replacing electrical signals with optical signals, significantly shortening transmission paths and reducing power consumption.

（Goldman Sachs names optical communications as the next AI infrastructure billion-dollar market, TSMC, Onsemi, and Broadcom benefit）

In terms of energy consumption, the difference is substantial. Traditional front-panel pluggable optical modules (FPP) consume about 20 picojoules per bit (pJ/bit); theoretically, CPO architectures can reduce this to below 5 pJ/bit, achieving over 70% power savings.

CPO's core challenges: heat dissipation and yield

Bubble Boi argues that for CPO technology to be mass-produced, the biggest challenge isn't the basic physics of light transmission through waveguides, but rather packaging-level heat management and manufacturing yield.

Currently, the industry’s mainstream packaging solution is TSMC's CoWoS (Chip on Wafer on Substrate), which integrates all chips onto a large silicon intermediary layer. This architecture faces fundamental scalability limits: each silicon intermediary layer is constrained by reticle size limits. Although TSMC has introduced derivatives like CoWoS-S, CoWoS-R, and CoWoS-L to address this, adding more chips or HBM stacks proportionally increases defect probability. If any chip has issues, the entire expensive package (costing tens of thousands of dollars) must be scrapped, with yield dropping rapidly once the equivalent area exceeds about 5.5 reticle sizes.

More challenging is that photonic engines are extremely sensitive to temperature, and high-performance GPUs or switch ASICs generate enormous heat during operation. How to integrate photonic engines into the same package substrate without crashing yield or losing control of heat dissipation remains the real bottleneck for CPO mass production.

Intel EMIB's advantage: localized solutions to tough problems

Bubble Boi believes that, unlike TSMC’s large integrated intermediary layer core of CoWoS, Intel’s EMIB (Embedded Multi-die Interconnect Bridge) adopts a completely different design logic.

EMIB replaces a large intermediary layer with a tiny silicon bridge, precisely coupling only in localized areas requiring high-density connections, concentrating high heat and complexity in these regions, while keeping other areas lower risk. This "localization of the most difficult problems" strategy shows clear advantages in manufacturing yield: industry estimates suggest EMIB packages can achieve yields over 95%, supporting packaging scales equivalent to about 12 reticle sizes, far better than CoWoS at similar sizes.

In silicon photonics, Intel has over 25 years of experience, and in 2024, demonstrated an optical I/O chiplet with EMIB, capable of bidirectional 2 Tbps transmission rates, with power consumption around 5 pJ/bit, and has completed fiber alignment and reliability tests compliant with JEDEC standards.

Among these, fiber alignment and reliability testing are still challenging areas for many CPO competitors and are critical technical barriers between demo and mass production.

Can TSMC’s iterative capability and COUPE solution take the lead?

It must be noted that Bubble Boi is himself a major figure at Intel, so considering "CPO market dominated by Intel" as a conclusion underestimates TSMC and its ecosystem’s resources and iteration capabilities.

TSMC’s COUPE platform, through SoIC-X chip stacking technology, plans to directly stack electronic chips onto photonic chips, aiming to integrate into advanced CoWoS packaging by 2026, forming a complete CPO architecture. This suggests optical communication could move from inter-server transmission media directly into the chip packaging layer itself. Additionally, TSMC is researching next-generation technologies like glass substrates (CoPoS) and hybrid bonding to address the physical limitations of silicon intermediary layers.

Broadcom’s Tomahawk 5 Bailly CPO switch has begun early customer shipments supporting 51.2 Tbps, with larger-scale production expected in 2026. These developments indicate that the commercialization race for CPO is not just about technology but also about manufacturing execution.

NPO as the best current transitional solution, with CPO expected to become widespread after 2028

To understand the competitive landscape of CPO, another key concept must be distinguished: Near-Package Optics (NPO).

Image source: Alphawave SEMI optical packaging technology roadmap: from pluggable optics, on-board optical / near-package optics (OBO / NPO), 2.5D co-packaged optical integration (2.5D CPO), 3D co-packaging (3D CPO), to fully integrated laser sources (Integrated Laser)

The difference between NPO and CPO lies in the degree of integration: CPO involves directly packaging the optical engine inside the chip; NPO places the optical engine very close to the package, connected via short electrical bridges, sacrificing a small amount of performance for better thermal isolation and manufacturing yield. Major cloud providers like Google currently adopt NPO solutions, utilizing both Intel EMIB and TSMC CoWoS packaging technologies.

From the current market situation, the three main solutions in data centers—Pluggable Optics, NPO, and CPO—coexist. Industry estimates suggest that large-scale replacement of traditional pluggable solutions by CPO will likely not occur until 2028–2030, with NPO still seen as the primary transitional approach.

What are the optical communications stocks? Opportunities in Taiwan’s supply chain

This wave of optical interconnects presents multiple opportunities for Taiwan’s semiconductor supply chain. TSMC (2330)’s COUPE platform is the most prominent core technology; Advanced Semiconductor Engineering (3363) has been incorporated into TSMC’s silicon photonics ecosystem for fiber array units (FAU), with specifications advancing toward 1.6T and even 3.2T; and Vanguard International (6830) focuses on silicon photonics and CPO’s optical loss detection and testing markets, providing services, equipment, and licensing.

Additionally, companies like Accton (2345), which deeply engage in networking equipment and are actively entering CPO, Synopsys (6451), specializing in optical transceiver modules, and Lianya (3081), with long-term focus on optical communication components, are also seen as potential beneficiaries. Leading advanced packaging firm ASE (3711), with extensive CoWoS experience, is also positioned to benefit.

Even though Intel EMIB offers tangible and measurable engineering advantages in CPO integration—especially in yield, heat dissipation, and fiber reliability testing—this race may not be a zero-sum game: Intel holds a key position in high-end CPO solutions, while TSMC’s ecosystem could leverage scale and customer relationships to maintain a dominant share.

The trend of light replacing copper is unstoppable, but who can first break through in heat dissipation, yield, and mass production execution will be the true variable determining the direction of this technological revolution.

• This article is reprinted with permission from: 《Chain News》
• Original title: 《Analyzing the "Light in, Copper out" Narrative: Has Intel’s EMIB Outrun TSMC in AI Optical Interconnect Technology?》
• Original author: Crumax