Samsung used Computex to preview HPB, or Heat Path Block, a thermal feature for its next-generation HBM5 memory

This is Samsung’s answer to a cooling approach that SK Hynix already revealed
Both companies are trying to solve the same problem: heat
HBM stacks many DRAM dies vertically on top of a base die, and each new generation keeps increasing capacity and bandwidth by adding more layers and pushing higher data rates. That also raises power density
Heat generated in the middle of a tall stack struggles to escape because it has to move upward through layers of silicon and through-silicon vias before reaching the cold plate on top. As stacks get taller and faster, this vertical bottleneck becomes a real limiter. Hot DRAM leaks more, needs more frequent refresh cycles, and can start to throttle
Samsung’s fix is to add a sideways heat path instead of relying only on the vertical route. HPB is a dedicated thermal structure placed next to the DRAM stack on the same base die. It is built to the same height as the stack and connected through a die-to-die PHY interface. Excess heat from the stack moves laterally into the HPB and then dissipates upward into the cold plate more efficiently
SK Hynix reached this idea first with iHBM, which embeds integrated cooling elements into the package using a process called MR-RUF
The first GPUs using HBM5 are not expected until 2028–2029, so both Samsung and SK Hynix still have years to refine these designs with their partners