$GOOG and $MRVL Are Working on a Separate Low-Latency Inference Chip


According to SemiAnalysis, Google is developing a separate TPU family focused on low-latency inference, codenamed Merope. In other words, this appears to be an LPU-like architecture built for faster inference workloads rather than the company’s mainline TPU roadmap
Reports also indicate that Marvell is involved in developing this design. The expected timeline is 2028, and it is separate from the main TPU programs being developed with Broadcom and MediaTek
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