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SemiAnalysis: SPHBM4 Standard May Alleviate AI Advanced Packaging Bottlenecks, Benefiting Substrate Industry

AirdropBlackHole
On July 3, the semiconductor and AI independent research institution SemiAnalysis published an article stating that JEDEC announced the SPHBM4 standard last week, which is the standard package for high bandwidth memory JESD330-4. SPHBM4 uses the same DRAM stack as HBM4 but replaces it with different buffer chips, aiming to achieve HBM assembly in standard packaging and alleviate bottlenecks in AI advanced packaging. The concept of SPHBM4 is to significantly reduce dependence on expensive and supply-constrained advanced packaging while maintaining HBM4 performance. SPHBM4 is a significant boon for the substrate industry. On one hand, traditional HBM must be kept very close to GPUs because wide parallel signals quickly degrade over distance; SPHBM4, however, uses high-speed serial channels, allowing memory to be placed up to 20 millimeters away, which will significantly increase the total substrate material area required per chip as the packaging area expands. On the other hand, 32 Gbps signals passing directly through organic substrates will increase electrical complexity, and SPHBM4 will promote the use of high-end, high-density ABF substrates with more than 20 to 28 layers, as well as future glass substrates. It stated that SPHBM4 will shift the complex engineering burden of AI chips from the 'silicon interposer + ABF substrate' combination to ultra-large, high-layer ABF substrates, and even advance the adoption of glass substrates, indicating that 'the prosperity of substrates has just begun.'
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