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Intel patent reveals new XBM memory architecture, plans to bypass HBM silicon interposer to reduce AI memory costs

MarsBitNews
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Mars Finance News, July 8 - Intel's recently published patent application shows that the company is developing a new high-bandwidth memory architecture called XBM (Cross-Batch Memory), which aims to reduce advanced packaging costs and alleviate the AI chip "memory wall" bottleneck by eliminating the silicon interposer required for HBM, adopting UCIe interconnect and built-in redundancy repair mechanisms. The patent shows that XBM adopts a back-end-of-line (BEOL) DRAM stack design, which can improve scalability while maintaining a package size similar to HBM4, and supports defect repair to improve yield. (Wide-angle Observation)
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