HBM packaging technology changes: Samsung and SK Hynix both delay HBM hybrid bonding adoption.

Samsung Electronics and SK Hynix are re-evaluating the timeline for adopting hybrid bonding technology in high-bandwidth memory (HBM). As HBM thickness standards gradually loosen and alternative solutions emerge for heat dissipation, the commercial deployment of this once-promising next-generation packaging technology has been repeatedly pushed back.

According to a Monday report from South Korean tech media ZDNet Korea, industry observers point out that the full-scale application of hybrid bonding technology in next-generation HBM may arrive later than previously expected. Both companies initially planned to introduce the technology as early as HBM4 (sixth-generation HBM), but ultimately opted to stick with traditional thermal compression bonding (TC bonding).

Currently, industry forecasts suggest the adoption of hybrid bonding could be delayed until 16-layer HBM4E (seventh-generation HBM), while some insiders believe the actual timeline may be pushed back even further.

This shift has a direct impact on the HBM supply chain and related packaging equipment manufacturers. The delay in hybrid bonding means an extended life cycle for existing TC bonding processes, and the capital expenditure rhythm for hybrid bonding equipment and materials will be adjusted accordingly.

Thickness Standards Ease, Hybrid Bonding’s Core Advantage Weakened

The main advantage of hybrid bonding lies in its ability to eliminate bump structures, directly connecting the copper wiring of each DRAM layer, thereby making it easier to reduce overall HBM thickness and improve heat dissipation and power efficiency. However, the market urgency for these advantages is declining.

HBM industry thickness standards have gradually been loosening. The standard thickness for HBM was 720 micrometers in HBM3E (fifth generation) and has been raised to 775 micrometers in HBM4, mainly due to the increase in stacking layers from 8 or 12 to 12 or 16. It is reported that JEDEC, the international semiconductor standardization body, is currently discussing further relaxing the thickness ceiling for 20-layer products like HBM5 from 900 micrometers to around 1000 micrometers. Once thickness constraints are relaxed, the inter-layer spacing of DRAM no longer needs to be compressed to the limit, and the technical pressure on TC bonding will also be alleviated.

At the same time, the timeline for core customers like Nvidia’s demand for high-stack HBM has also shifted backward. An industry source A from the memory sector said, "Currently, discussions between clients and memory manufacturers about 16-layer HBM are not very active. For now, even in HBM4E, 12-layer products are likely to continue dominating."

Alternative Heat Dissipation Solutions Emerge, Both Companies Explore Different Paths

Improved heat dissipation performance is another major selling point of hybrid bonding—removing underfill materials with low thermal conductivity helps enhance HBM thermal characteristics. However, Samsung Electronics and SK Hynix have each developed alternative heat dissipation technologies that do not rely on hybrid bonding.

The core of both companies’ solutions is to integrate an independent heat dissipation device next to the HBM core chip. Samsung Electronics calls it the Heat Path Block (HPB), while SK Hynix refers to it as iHBM (ICE HBM). Both companies are currently testing the application of these technologies for HBM5.

A packaging industry source said, "Configuring a heat dissipation device next to the HBM core chip is not technically difficult, and commercialization should face no obstacles. From the perspective of memory companies, this is a stable choice."

I/O Density Bottleneck May Become the Ultimate Driver for Hybrid Bonding

Despite the short-term delay in the adoption timeline, R&D efforts on hybrid bonding by Samsung Electronics and SK Hynix are expected to continue. The driving force comes from the explosive growth in I/O density required for HBM’s long-term evolution.

HBM4 has already doubled the number of I/Os from 1,024 in HBM3E to 2,048, significantly narrowing the internal pitch of HBM. TC bonding, which causes lateral diffusion when bumps melt, is considered by the industry to be insufficient for supporting higher-density I/O implementation. Packaging industry source C noted, "In the medium to long term, the industry is discussing doubling I/O numbers again to 4,096 starting from HBM5E, at which point the I/O pitch will be extremely tight, making hybrid bonding a necessary option."

This means hybrid bonding technology has not been abandoned, but rather delayed—its true commercial window may reopen when I/O density reaches a critical breakthrough with the generational evolution of HBM.

Risk Warning and Disclaimer

        Market risks exist, and investments must be made with caution. This article does not constitute personal investment advice and does not consider the specific investment objectives, financial situations, or needs of individual users. Users should consider whether any opinions, views, or conclusions in this article are suitable for their specific circumstances. Investment decisions based on this article are at your own risk.