Samsung and SK Weigh Timing of Hybrid Bonding Adoption for HBM

Samsung Electronics and SK Hynix are deepening their deliberations over when to adopt hybrid bonding technology to realize next generation high bandwidth memory (HBM).
The reason is that the need for the technology's key strengths, "thickness reduction" and "enhanced heat dissipation performance," has diminished. Within the industry, there is a view that the necessity of adopting hybrid bonding will resurface once the number of I/O (input output terminals) in HBM explodes.
According to the industry on the 6th, there are observations that the point at which hybrid bonding is fully applied to next generation HBM may be delayed relative to expectations. Although there were once forecasts that hybrid bonding technology could be applied starting from HBM4 (the sixth generation of HBM), this did not materialize due to factors such as technical difficulty.
Major memory companies including Samsung Electronics and SK Hynix have continued research and development (R&D) to apply hybrid bonding, a next generation packaging technology, to HBM. The bonding technology currently used in HBM mass production is thermal compression (TC) bonding. It is a structure in which fine protrusions called bumps and an underfill material that serves as a support are placed between DRAM and DRAM, then joined together using heat and pressure.
Hybrid bonding directly joins the copper wiring of each DRAM. Because it does not use bumps, it makes it easier to reduce the overall thickness of HBM and can improve heat dissipation characteristics and power efficiency. The I/O (input output terminals) that serve as data transmission pathways inside the HBM can also be connected at higher density.
Initially, Samsung Electronics and SK Hynix were expected to apply hybrid bonding technology as early as HBM4 (the sixth generation of HBM), but they applied conventional TC bonding instead. There are now forecasts that it may be adopted starting from 16 layer HBM4E (the seventh generation of HBM). The expected point of application has been pushed back.
Next Generation HBM Sees Reduced Need for Thickness Reduction
Within the industry, there are also observations that the timing of hybrid bonding adoption could be pushed back further. The reason is that the necessity of hybrid bonding's advantages, namely reduced HBM thickness and improved heat characteristics, is declining.
In the case of HBM thickness, the industry standard is gradually being relaxed. The HBM standard was originally 720 micrometers in thickness through HBM3E (the fifth generation of HBM), but it was raised to 775 micrometers with the arrival of HBM4. The main driver was that the number of stacked DRAM in HBM4 rose from the previous 8 layers and 12 layers to 12 layers and 16 layers.
The Joint Electron Device Engineering Council (JEDEC) is known to be discussing a plan to relax the thickness of next generation HBM that stacks 20 layers, such as HBM5, from 900 micrometers up to a maximum of around 1,000 micrometers. If the thickness standard is relaxed, the spacing between DRAM does not have to be reduced to the extreme, which can ease the burden on bonding technology.
The fact that demand for high stack HBM from key customers such as Nvidia is being pushed back is also a variable.
One memory industry official, A, explained that "discussions on 16 layer HBM between customers and memory manufacturers are not actively taking place at present," adding that "for now, there is a strong possibility that 12 layer products will remain the mainstay even in HBM4E."
Samsung and SK Improve HBM Heat Dissipation With a Separate Device, to Be Applied From HBM5
Hybrid bonding is also advantageous for improving HBM heat characteristics because it removes the underfill material, which has low thermal conductivity.
However, Samsung Electronics and SK Hynix have recently devised technology that can improve the heat characteristics of HBM in a different way. The core of it is placing a separate device that dissipates heat next to the HBM. Samsung Electronics calls this the Heat Path Block (HPB), while SK Hynix calls it iHBM (ICE HBM). Both companies are testing the technology for application in HBM5.
Packaging industry official B said that "implementing a heat dissipation device and placing it next to the HBM core die is not technically very difficult, so there should be no obstacles to commercialization," and that "from the memory companies' standpoint, it is a stable option."
"Hybrid Bonding R&D Will Continue"
Even so, Samsung Electronics and SK Hynix are expected to continue their hybrid bonding R&D. This is because applying hybrid bonding becomes advantageous if the number of I/O increases and density improves in next generation HBM.
For example, HBM4 was implemented with 2,048 I/O, double that of the previous generation HBM3E. In this case, the spacing inside the HBM must be narrowed considerably. TC bonding is assessed as having difficulty implementing any further I/O beyond this point, because the bumps spread sideways as they melt.
Packaging industry official C stated that "over the medium to long term, there are discussions that the number of I/O will double once again to 4,096 starting from HBM5E," and that "in this case, the I/O spacing is very narrow, so hybrid bonding will need to be applied."