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Huawei Releases V2 Version of 'Tao's Law' Paper: Kirin 2026 Data Publicly Released for the First Time, Supplementing Engineering Details and Measured Data

AirdropBlackHole
According to Dongcha Beating monitoring, Huawei's semiconductor head He Tingbo released the paper 'Time Shrinking Theory for Multi-Level Electronic Systems' (Tao's Law) V2 version on July 3 on the Chinese Academy of Sciences' pre-publication platform ChinaXiv. Compared to the V1 version released on May 25, the new version supplements a wealth of engineering implementation details and measured quantitative data based on the theoretical framework, forming a complete discussion system of 8 chapters. It also introduces principle and schematic diagrams covering core technologies such as the τ layered spatiotemporal model, LogicFolding architecture, bonding interface cross-section, Unified Bus interconnection architecture, and Hi-ONE optical engine. In terms of engineering implementation, the V2 version deeply explains the 'gear ratio' concept of LogicFolding: when the mixed bonding spacing approaches the size of the top-level metal wiring, the 3D design space shifts from traditional 'macro-block level discrete optimization' to 'cell level continuous optimization', achieving globally optimal vertical logic partitioning and breaking through the limitations of traditional 3D stacking that could only layer by functional blocks. The V2 version also presents for the first time a mass production measured data table, clearly listing the voltage, frequency, normalized power consumption, area, and power density parameters of Kirin 2026 compared to the benchmark Kirin 9030 Pro, further validating the post-Moore era scaling theory centered on the time constant τ through measured data.
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