Huawei announces the "Tao's Law" for semiconductors, replacing geometric dimensions with a temporal dimension; in Q3, all Kirin chips will fully adopt logical folding.

Huawei Semiconductor Business Unit President He Tingbo Officially Presents the "Tao (τ) Law" at the 2026 International Circuit and System Conference, Proposing Replacing Geometric Shrinkage with Temporal Miniaturization, Using Logic Folding Technology to Continuously Compress Signal Propagation Delay, Becoming China's First Self-Developed Industry Development Principle in Semiconductors. Based on this law, Huawei has successfully designed and mass-produced 381 chips over the past six years; by 2031, high-end chip transistor density is expected to reach the same level as 1.4-nanometer process technology.
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• 381 chips in six years, from theory to mass production
• Autumn Kirin chips first fully adopt logic folding
• Multi-level collaborative optimization system and 2031 goals
• Naming of the "Tao (τ) Law" and its strategic implications for China's semiconductor industry

Huawei's Director and President of the Semiconductor Business Unit, He Tingbo, delivered a keynote speech titled "Exploration and Practice of New Paths in Semiconductors" at the 2026 International Circuit and System Conference (ISCAS 2026) held in Shanghai on the 25th, officially introducing the "Tao (τ) Law." This is the first time China has independently proposed a guiding principle for industry development in the global semiconductor field, marking a new direction for China's chip technology path from chasing geometric miniaturization to system-level delay compression.

According to People's Daily, the core concept of the "Tao Law" is to replace the decades-long adherence to geometric miniaturization in the semiconductor industry with "temporal miniaturization," aiming to systematically reduce the time constant (τ) through innovative techniques such as logic folding, continuously compressing signal propagation delay, thereby increasing transistor density and achieving sustainable evolution of semiconductors and electronic systems.

381 chips in six years, from theory to mass production

He Tingbo pointed out in his speech that, based on this new principle, Huawei has successfully designed and mass-produced 381 chips over the past six years, covering multiple fields from terminal devices to infrastructure. This figure not only demonstrates Huawei's resilience in maintaining chip R&D capabilities under U.S. sanctions but also reflects that the "Tao Law" has been preliminarily validated through actual product iterations.

These 381 chips include Huawei's HiSilicon product line, such as Ascend AI accelerators, Kunpeng server processors, and Kirin mobile chips. Against the backdrop of tightening U.S. export controls, Huawei is gradually establishing a non-U.S. chip design and manufacturing supply chain, and the "Tao Law" serves as the technical theoretical foundation for this strategy.

Autumn Kirin chips first fully adopt logic folding

He Tingbo also announced that Huawei will release a new generation Kirin mobile chip this fall, fully utilizing logic folding technology to significantly enhance performance. Logic folding is one of the key practical implementations of the "Tao Law," which reorganizes internal logic unit layout and interconnection structures within the chip, achieving optimal performance and power efficiency without relying on advanced process miniaturization.

It is noteworthy that this means the new Kirin chips may no longer depend on the most advanced nanometer processes (such as 3nm or below), but instead compensate for process limitations through architectural innovation. This has profound implications for the global semiconductor industry—if logic folding technology can be validated at mass production, it will open a new technical pathway for chip designers restricted by export controls on EUV exposure machines and similar equipment.

Multi-level collaborative optimization system and 2031 goals

The "Tao Law" constructs a multi-level collaborative optimization system spanning device, circuit, chip, and system levels. Unlike the traditional Moore's Law, which solely pursues transistor feature size reduction, the "Tao Law" approaches from the perspective of system-level time constants, seeking cross-layer delay optimization.

He Tingbo expects that by 2031, high-end chips based on this law will reach transistor densities comparable to 1.4-nanometer process technology. This demonstrates Huawei's confidence in this technological path and sets clear technical milestones for chip R&D over the next five years.

Naming of the "Tao Law" and its strategic implications for China's semiconductor industry

The character "Tao" is directly taken from He Tingbo's name, also implying strategy and planning in "Wen Tao Wu Lue" (literally "literary strategy and martial tactics"). The Greek letter τ (tau) is commonly used in physics to denote a time constant, echoing the law's emphasis on delay compression.

This naming approach is similar to Moore's Law, named after its founder Gordon Moore, highlighting Huawei's and China's semiconductor industry's attempt to establish autonomous technological discourse. Amid the ongoing reshaping of the global chip supply chain and the intensifying U.S.-China technological competition, the introduction of the "Tao Law" is not only a technical declaration but also a symbol of industrial policy and national strategy.