Time scaling, this new track, Huawei has essentially continued Moore's Law.

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BlockBeatNews
Huawei proposes the τ scaling law, with Kirin chips first using LogicFolding this fall.
Huawei proposed the τ scaling law at ISCAS, advocating for replacing geometric scaling with time scaling, combined with device optimization, LogicFolding, parallel architectures, and UnifiedBus to achieve cross-layer breakthroughs.
A total of 381 chips have been mass-produced, and by 2031, high-end chips are expected to reach an equivalent transistor density of 14Å process technology, with Kirin chips adopting LogicFolding for the first time.
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