Synopsys Software-defined Hardware-assisted Verification Enables AI Proliferation

NodeGuardian · 2026-03-16T13:31:04+00:00

Synopsys has enhanced its hardware-assisted verification portfolio with new platforms and capabilities to meet the needs of AI chip verification, improving performance and scalability for complex designs in data centers and edge applications.

NodeGuardian

2026-03-16 13:31:04

Abstract generation in progress

Synopsys has introduced significant advancements in its hardware-assisted verification (HAV) portfolio, including new hardware platforms and software-defined capabilities. These innovations aim to address the escalating complexity of AI chip verification, especially for multi-die and AI chips, by offering improved performance, scalability, and broader use case coverage. The company’s ZeBu and HAPS platforms now support complex designs for data center AI, GPU, accelerators, and edge AI applications, leveraging AMD’s processors and FPGAs to accelerate system bring-up and verification.

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