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Intel's Market Value Reconfiguration: From Advanced Packaging to the Transmission Mechanism of Stock Price
Author: Godot; Source: X, @GodotSancho
Huang Renxun repeatedly emphasized at GTC 2026 that AI is shifting from retrieval to generation, from training to continuous reasoning.
In the era of reasoning plus intelligent agents, the role of CPUs is fundamentally reshaped. AI drives data center CPU demand, GPUs only handle token processing, and CPUs coordinate in the middle.
Reasoning orchestration involves a large number of branch predictions and control flow operations, so CPUs need not only more cores but also higher single-core performance.
In September 2025, Nvidia bought $5 billion worth of Intel common stock at $23.28 per share, while announcing two product lines.
On the data center side, Intel manufactures custom x86 CPUs for Nvidia, which are integrated into AI infrastructure platforms and sold externally. On the personal computing side, Intel produces x86 system-on-chips (SoCs) that integrate Nvidia’s RTX GPU chiplets.
Nvidia plans to expand its AI server line from 2026 to 2028. The HGX Rubin NVL8 platform is a server motherboard connecting 8 Rubin GPUs, supporting x86-based generative AI platforms via NVLink.
Each NVL8 requires 2–4 x86 host CPUs, and each NVL72 set needs 36 Nvidia Vera CPUs plus x86 CPUs for management.
Based on the shipment of 2 million NVL8s and 500k NVL72s in 2027, this corresponds to Intel’s custom x86 CPU shipments of 5–8 million units, with an average price of $1,500–$2,500, generating annual incremental revenue of approximately $7.5–$20 billion.
This is a new revenue stream completely independent of Intel’s external foundry services (IFS).
The second product line is the standard product for the AI PC era. At Computex 2026, Nvidia partnered with MediaTek to launch the RTX Spark super chip (Grace CPU plus Blackwell RTX GPU), a standard solution for AI-enabled PCs.
Simultaneously, an Intel-Nvidia collaboration on x86 SoCs with RTX chiplets is in development, targeting mass production in 2027. The global AI PC shipment is expected to reach 100–150 million units in 2027. If this SoC captures 30–40% market share, it could generate annual incremental revenue of $6–24 billion.
Combined, these two lines could add $13.5–44 billion in annual incremental revenue, a story entirely separate from external foundry revenues. Relative to Intel’s total revenue of $52.9 billion in 2025, this represents a 25% increase. However, the seller’s model for Intel’s structure almost never lists this as a separate line item.
Huang Renxun repeatedly emphasized at CES 2026 and GTC 2026 that the Vera Rubin platform is “specifically designed for agentic AI systems,” with the Vera CPU named “agent-oriented CPU,” forming a dual-source relationship with Intel’s custom x86. Nvidia also develops its own Vera CPU based on Arm architecture for its systems.
Meanwhile, Intel continues to serve large-scale data centers like Meta, Microsoft, and Oracle that insist on the x86 ecosystem, providing custom x86 solutions.
Turning to valuation: Currently, Nvidia’s market cap is $626 billion, with an implied valuation of about $450 billion for IFS. Rough estimates suggest the incremental value brought by Nvidia’s collaborations could be between $500k and $300 billion. This part has not been explicitly itemized by analysts.
If milestones for related products are announced over the next 12–18 months, this value will become clearer.
18A and 2nm Technology Details
The so-called 2nm (nanometer) represents an advanced process node upgrade.
Only TSMC, Samsung, and Intel can produce 2nm chips globally. Samsung’s 2nm process faces yield issues, limiting customer acceptance, so actual competition mainly centers on TSMC’s N2 and Intel’s 18A.
This is the first time in 12 years that Intel’s process node is on par with TSMC’s generation. The last was 2014’s 22nm FinFET, where Intel led TSMC by three years.
18A will determine whether Intel can re-enter the list of leading process suppliers, directly affecting external foundry revenue and Intel’s valuation restructuring.
Intel 3 is the current mainline
Intel 3 is Intel’s current flagship server CPU node, mass production starting in late 2024. Products include Sierra Forest (Xeon 6 efficiency cores), Granite Rapids (Xeon 6 performance cores), among others.
Intel 3 is responsible for 22% year-over-year growth in the Data Center and AI (DCAI) division, as reported in earnings. In Q1 2026, $5.1 billion in DCAI revenue, mostly from Granite Rapids and Sierra Forest.
Intel 18A Next-Generation Advanced Process
Intel 18A is Intel’s leading node, entering volume production in HVM ramp-up in October 2025. The first product, Panther Lake, launches in January 2026.
Technologically, it introduces GAA (Gate-All-Around, surround-gate technology) combined with BSPDN (Backside Power Delivery Network), matching TSMC’s N2.
Products include Panther Lake (Core Ultra Series 3 consumer PC CPU), Clearwater Forest (Xeon 6+ efficiency cores), Diamond Rapids (Xeon 6+ performance cores).
Clearwater Forest is Intel’s first 18A server CPU, with large-scale shipments expected in late 2026.
Diamond Rapids will come later, from Q4 2026 to Q1 2027. Therefore, the real contribution of 18A to server CPU revenue will only begin to show in Q4 2026, becoming mainstream in 2027.
TSMC’s N2 is a direct competitor to 18A, with mass production starting in late 2025 and commercial shipments beginning in 2026. It features GAA but without BSPDN, which is delayed to N2P. Confirmed products include Apple’s A20 and M-series SoCs, MediaTek Dimensity flagship chips, AMD Zen 6 EPYC server CPUs, some Nvidia GPU compute chips, and most of Intel’s Nova Lake compute modules. Qualcomm Snapdragon flagship chips are under negotiation.
TSMC’s N2 has a clear lead over 18A in customer count and wafer volume, mainly due to more mature design kits (PDK) and IP, lower migration costs, and a yield curve ahead by about 2–3 quarters.
18A’s Technological Innovations
Though seemingly complex, it’s actually straightforward.
Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are the fundamental devices in all logic chips today. Their working principle is controlling the conductivity of a channel (electron flow path) via the voltage applied to the gate.
The core engineering challenge at each process node is maintaining gate control as the channel length shrinks.
Ten years ago, Intel’s 22nm FinFET introduced a fin-shaped channel structure, with the gate wrapping around three sides.
Today, 18A introduces GAA (Gate-All-Around), where the gate completely surrounds the channel on four sides, hence “all around.”
This four-sided wrapping allows further channel miniaturization and density increase. RibbonFET supports higher per-unit power performance, lower minimum operating voltage, and higher drive current, directly affecting transistor switching speed and maximum clock frequency.
PowerVia, the backside power delivery network, is Intel’s second revolutionary structural innovation in 18A.
The core idea is dividing the power supply, moving the original front-side power lines to the back of the transistors, leaving only fine signal lines on the front.
This effectively increases transistor density and performance, solves voltage droop issues, and simplifies design.
The cost is that implementing backside power delivery nearly doubles the process steps on the wafer, with each additional step risking yield loss.
18A Yield Challenges
Although 18A entered volume production in October 2025, its yield remains below profitable levels. According to CFO Zinsner, it will take until late 2026 to reach the “expected cost threshold.”
From an engineering perspective, volume production involves four stages:
The October 2025 volume production is between risk and limited production.
Starting from a 25% yield, improving by 7% per month, it would take about 8.5–9 months to reach 85%, the industry’s normal level, pointing to early fall 2026.
However, the market cares not just about current yield but about the yield improvement curve. Lip-Bu Tan explicitly stated at CES 2026 that 18A’s yield has been steadily improving at 7% per month over the past 7–8 months, and this curve is the basis for pricing.
18A Demand and Customers
Originally, demand for 18A mainly came from Intel’s own products.
But on June 18, Trump announced on Truth Social that Apple had agreed to collaborate with Intel on designing and manufacturing chips in the U.S.
According to Investing.com and MLQ News, Apple and Intel reached a preliminary foundry agreement in May, targeting the 18A-P node, an enhanced version of 18A. It was announced at the VLSI Symposium on June 16 to enter risk production, with first shipments expected in Q2 or Q3 2027. Intel will serve as a secondary foundry alongside TSMC.
Apple is one of the most demanding customers for process details, so this signing is a strong endorsement of yield. Second, Trump’s announcement elevates the strategic priority of domestic manufacturing in the U.S. Third, Apple’s signing will reduce risks for other hesitant customers and accelerate negotiations with Intel.
Currently, 18A customers are divided into four tiers:
1) Signed or highly confirmed anchor customers
Microsoft announced in February 2024 that it will use 18A as the foundry for its next-generation AI infrastructure chips, specifically the Maia 2 series AI accelerators.
Apple is the second confirmed anchor customer.
2) Customers actively negotiating
Nvidia’s relationship with Intel is the most complex and underestimated in the current IFS story, as previously mentioned.
Google’s TPU series is designed with Broadcom and manufactured by TSMC. The main compute die likely remains with TSMC, but Intel has opportunities in advanced packaging, such as using its embedded multi-die interconnect bridge (EMIB) and Foveros 3D packaging to provide encapsulation for some TPU designs.
Google also has a potential dual-sourcing path for next-generation TPU compute dies. Considering TSMC’s N2 capacity constraints and Google’s desire to reduce dependence on TSMC, Intel could become a secondary supplier for TPU in 2028–2029.
3) Interested but unconfirmed customers
Qualcomm appeared alongside Tan at Intel Foundry Direct Connect 2025, named as an ecosystem partner along with MediaTek and Microsoft. Potential cooperation includes secondary procurement of Snapdragon flagship ARM-based mobile SoCs and wafer supply for Snapdragon X series PCs.
Qualcomm has traditionally used TSMC but has recently begun exploring hedge options with Intel.
MediaTek is another customer at Direct Connect 2025. Its main business is Android mobile SoCs (Dimensity series) and Chromebook processors, mainly using TSMC. But MediaTek is also actively developing TPU ASICs for large-scale customers, which could involve collaboration with Intel.
Bank of America’s June 11 report explicitly listed MediaTek’s TPU wafers as an incremental opportunity for IFS.
Broadcom was reported to have strong interest in 18A but later, Reuters in 2024 reported that Broadcom was “dissatisfied” after evaluating 18A. Currently, Broadcom’s relationship with Intel is cooling.
Tesla is a potential short-term order in advanced packaging. Tesla’s self-developed Dojo AI training chips were previously manufactured by TSMC; future inference chips may seek Intel’s packaging cooperation. Tesla is not a high-volume customer but, as a “Made in America” company favored by the Trump administration, its partnership with Intel has policy visibility.
4) Rumored or unlikely or negative signals
The U.S. Department of Defense collaborates with Intel through the Secure Enclave project to produce custom chips for military and intelligence applications. These revenues are relatively small but strategically significant.
Intel’s Segment Economics and IFS Financial Structure
Intel’s financial reports are among the most complex in the semiconductor industry because Intel is both an IDM vertically integrated manufacturer and a foundry, with internal procurement relationships between segments.
In Q1 2026, Intel’s Foundry Services (IFS) reported revenue of $5.4 billion and an operating loss of $2.4 billion. Of this, $5.2 billion was internal revenue, transferred from other Intel divisions. External revenue from third-party customers was only $174M.
Intel currently reports six segments:
The last two are not elaborated here. The main profit drivers are CCG, DCAI, and IFS.
CCG targets consumer and enterprise PCs; it is Intel’s largest revenue segment, with $7.7 billion in Q1 2026, down 6% quarter-over-quarter, with a profit margin of 33%.
DCAI targets data centers and AI infrastructure; revenue was $5.1 billion, up 22% YoY, with a profit margin of 31%. This 22% growth is one of the strongest signals over the past six quarters, mainly driven by Xeon 6 and Xeon 6+ using Intel 3 process, not 18A.
IFS reported revenue of $5.4 billion, up 20% QoQ, but with an operating loss of $2.4 billion, and a profit margin of -45%.
Comparing these, it’s clear that Intel’s internal product side is a mature, high-margin business, while manufacturing is a loss-making, money-burning operation.
In Q1 2026, Intel’s product side bore an additional $489 million in profit reduction compared to Q1 2025, mainly because the unit cost of 18A wafers is significantly higher than previous main process nodes.
Meanwhile, the costs of Intel 3 and Intel 4 wafers are decreasing, consistent with normal yield improvement curves. The opposing forces result in IFS’s overall loss worsening by $72 million quarter-over-quarter, aligning with early-stage ramp-up costs and offsetting improvements from older nodes.
Further, we can estimate the yield range for 18A. Intel has publicly stated that Panther Lake test chips have a yield between 55% and 75%. The compute tile area of Panther Lake is about 100 mm², much smaller than Maia 2’s 820 mm².
Under the same defect density, smaller chips have higher yields. Extrapolating defect density from 100 mm² to Maia 2’s size suggests Maia 2’s yield under current 18A process might only be 15–25%. This is the fundamental reason why Microsoft’s Maia 2 volume production has been repeatedly delayed.
In summary,
Intel’s product side, excluding wafer foundry, remains a profitable company with annual operating profits of $7–8 billion.
The external foundry business of IFS is still very small, nearly breakeven at present, and vastly under the market’s projected external revenue of $47.1 billion in 2030. Therefore, IFS’s valuation depends almost entirely on growth assumptions.
Of the current $2.4 billion quarterly loss, over 70% is startup costs and low-efficiency ramp-up, which are expected to narrow significantly as 18A matures around 2027–2028, becoming a key valuation variable.
Next quarter, focus on three trends:
External Capital Framework: Smart Capital
Mainly five parts:
1) Government subsidies
The core is the “CHIPS Act.” Over the past five years, Intel invested $108 billion in capital and $79 billion in R&D, mostly to expand U.S. manufacturing capacity and process technology.
Since August 2025, U.S. government investments have totaled $11.1 billion, supporting about 10% of Intel’s $108 billion capital expenditure.
2) Semiconductor Co-Investment Projects (SCIP)
Intel’s joint venture wafer fab projects with private equity. Two notable ones:
August 2022, with Brookfield Asset Management, investing up to $30 billion in Fab 52 and Fab 62 in Arizona’s Ocotillo park, with Intel contributing 51%, Brookfield 49%.
June 2024, with Apollo Global Management, investing $11.2 billion for a 49% stake in Ireland’s Fab 34. On April 1, 2026, Intel announced a $14.2 billion buyback of Apollo’s 49% stake.
Fab 34, located in Leixlip, Ireland, is Intel’s most advanced high-volume manufacturing site in Europe. Intel paid $14.2 billion to repurchase it.
3) Customer Prepayments
IFS customers are willing to prepay to lock in capacity. Currently, publicly disclosed prepayment scales are much smaller than those from AI infrastructure companies like IREN or Nebius from Microsoft, reflecting that external IFS customer business is still in early stages.
4) External Foundries
Intel also uses external foundries like TSMC for some products, as long as their capabilities support Intel’s leading-edge products.
5) Smart Capacity Investment, i.e., building low-cost “shell fabs”
Constructing basic facilities first, then installing equipment once customer demand and process maturity are achieved.
Thus, Intel’s capital expenditure burden is shared among the federal government, PE, customers, external foundries, and Intel itself.