Samsung Electronics unveiled its next-generation AI memory portfolio at the Future of Memory and Storage (FMS) 2026 conference in Santa Clara, California, presenting a comprehensive technology roadmap designed to meet the growing demands of high-performance computing and artificial intelligence infrastructure. The company showcased approximately 30 memory and storage technologies at an AI cloud server-inspired booth, while executives Jin-Yub Lee, Executive Vice President and Head of Flash Product & Technology, and Kyungryun Kim, Vice President of the DRAM Design Team, delivered the opening keynote titled "Driving the Wave of AI Revolution: 3D Innovations in Memory & Storage Architecture." The announcement addresses the fast-growing requirements of AI accelerators and data center infrastructure with vertical memory architectures and advanced manufacturing capabilities.
Samsung Introduces zHBM and zNAND-O Vertical Memory Architectures
Samsung introduced zHBM, which vertically stacks high-bandwidth memory directly above AI accelerators rather than positioning it alongside the chip. Samsung states that this design minimizes data travel distance, delivering approximately eight times the performance of HBM5, more than ten times the memory density, and three times the energy efficiency, while reducing thermal resistance by over half. The architecture supports custom intellectual property integration between layers, enabling tailored solutions for specific accelerators. Samsung also previewed zNAND-O, a V-NAND-based solution developed in four- and eight-layer variants that combines high space efficiency with low latency for real-time edge AI workloads.
Samsung Announces V10 BV-NAND With Over 400 Layers and Production Roadmap
Samsung announced V10 BV-NAND, the industry's first Bonding V-NAND architecture enabled by new wafer bonding technology. Featuring more than 400 layers, the device increases memory density by approximately 58 percent over the previous V9 generation while improving read, write, and I/O performance. The milestone arrives thirteen years after Samsung introduced the industry's first V-NAND. Following the mass production of HBM4 in February, the company began shipping HBM4E samples in May and exhibited its HBM5 model at FMS 2026. Samsung showcased LPDDR5X-PIM, the industry's first low-power DDR memory with processing-in-memory technology, which executes computations within the memory array to limit data movement and power draw. For data center infrastructure, the PM1763 and BM1773 enterprise storage solutions were featured. Samsung highlighted its end-to-end turnkey strategy, offering integrated design and manufacturing services intended to shorten development cycles and optimize performance for AI semiconductor customers.
FAQ
What did Samsung unveil at FMS 2026?
Samsung unveiled its next-generation AI memory portfolio at the Future of Memory and Storage (FMS) 2026 conference in Santa Clara, California, showcasing approximately 30 memory and storage technologies including zHBM, zNAND-O, and V10 BV-NAND.
What are the performance specifications of Samsung's zHBM technology?
Samsung states that zHBM delivers approximately eight times the performance of HBM5, more than ten times the memory density, and three times the energy efficiency, while reducing thermal resistance by over half.
How many layers does Samsung's V10 BV-NAND feature?
Samsung's V10 BV-NAND features more than 400 layers and increases memory density by approximately 58 percent over the previous V9 generation while improving read, write, and I/O performance.
